最近终于完成了CS61C (fa20)，浅写个总结。

英文是从我的repo直接抄来的

课程结构

Centered on several great ideas in computer architecture. Specifically,

  1. The first half of the course teaches what’s called “the old school machine structures”.

    • High level language program - C [lec3-6]

    • Assembly language program - RISC-V [lec7-13]

    • Machine Language - still RISC-V, but without pseudo instructions [lec7-13]

    • Hardware architecture description - block diagrams, datapaths, cache, pipelining, virtual mem, etc. [lec17-27]

    • Logic circuit description [lec14-16]

Basically, that’s everything from the top – the programmer-friendly high level language C–, to the bottom arch – circuits, logic gates, and transistors–.

In terms of actual sequence, it’s like top -> middle, then bottom -> middle, and finally the two lines meet at around project3 (DIY a CPU datapath).

  1. The second half teaches the new-school structures, which include more recent ideas of parallelism / high performance programming that companies hardware improvements.

    • data-level parallelism - SIMD [lec32], MapReduce, Spark, etc. [lec36]

    • thread-level parallelism - threads, cache coherency, OpenMP, etc. [lec33-35]

    • dependability [lec38]

Lab总结

跳过了几个没有成功setup的lab。

  • Lab1 Number Rep, C and CGDB: familiarize you with c and debugging tools
  • Lab2 Advanced C: bit manipulations, memory allocation, and pointers in C
  • Lab3 RISCV Assembly: ask u to figure out how simple C programs work on a lower level and write RISC-V assembly code
  • Lab4 RISCV Functions, Pointers: still RISC-V practices, asking you to modify code to make the program work
  • Lab5 Logisim: ~ build logic gates and practise with combinational logic
  • Lab7 Caches: back to RISC-V, implement and optimize matrix-related functions to understand how cache works. This lab is valuable as it touches on one way to squeeze out performance.
  • Lab8 OS, I/O, DMA, Disks, Networking & Virtual Memory: ~ play with a virtual memory simulator to understand how it works
  • Lab9 SIMD Instructions: ~ work on single instruction multiple data (SIMD) – write C functions and improve their performance with x86 intrinsics. It’s like inserting assembly code into C code. (Note that ARM users unfortunately would have to use ARM NEON intrin to be able to compile the programs.)
  • Lab10 Thread Level Parallelism: have you experience parallel programing with C + OpenMP. Ask you to apply parallelism to the implementation of sum vector and dot product C funcs.

后记

课如其名，这门课最重要的是几个great ideas in computer architecture，是一层一层往下理解计算机的工作原理，其次才是掌握具体的实现细节（不是说不重要，是ideas > implementation）。但可能是因为课程设定是体系结构入门+老师都有ee背景，感觉好多地方通识性质很强，且是从硬件设计角度切入的。于是之后还打算去补一下15-213的csapp。

关于笔记：本来在考虑整理笔记，但想了下61c里对我比较重要的知识都没办法系统性整理，或者说意义不太大，理由同上。比如C和RISC-V的语法没必要全部照抄一遍，OS部分大多是概念，datapath的部分很多又已经给了discussion notes，最后的并行也只教了冰山一角。

其他注意事项：20fa的版本里Bora负责的部分听起来稍吃力一些，但两位老师讲得都还是很好的。以及，m芯片带来了少许麻烦，中间碰到需要用x86指令相关库的时候还得被迫学一遍arm的对应指令（btw cgpt翻译是可行的）。

进度

计划30个自然日内完成——顺利实现，虽然实际span将近两个月。

  • 【0611】setup, lab00
  • 【0615】lec1&2
  • 【0616】lec3
  • 【0617】lec4
  • 【0625】lec5, lab01
  • 【0626】lec6
  • 【0627】proj1A
  • 【0702/03】proj1 Fin
  • 【0704】K&Rch1-2
  • 【0705】lec7+8.1, lab2
  • 【0706】disc2
  • 【0715】lec8-10
  • 【0716】lab3
  • 【0719】disc3, disc4
  • 【0724】proj2 partA 50%
  • 【0725】proj2 partA fin
  • 【0801】lec11-13
  • 【0802】disc5, lab4, lec14-15
  • 【0803】lecs16+SDS State Logic handouts, lec17
  • 【0804】lab5, lec 18-19
  • 【0805】lec20-27 (fin CPU Pipelining Caches), disc6-8
  • 【0806】disc9, lab7, lec28-2931 (fin OS VMi)
  • 【0807】lec30-31(VMii I/O), disc10, lab8, disc11
  • 【0808】lec32-35 (SIMD/MIMD, Parallelism), lec36-38 (MapReduce, WSC, RAID)
  • 【0809】disc12, lab9, lab10, disc13-14
  • 【skipped due to compatibility probs】proj4, proj3, lab6, lab11